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NIOT-E-NPIX-EVA EPROM
#1
Hi Hilscher

I have been asked to clarify a few points regarding the board with Hilscher. I have determined that in order to use the NIOT-E-NPIX-EVA with the netPI/netEdge RTE products an EEPROM is required as detailed here:
https://forum.hilscher.com/Thread-SPI-ac...g-extender
 
I have version 1 netPI hardware with the SD card glued into the product which does not allow us to change the Linux distribution and configure the devices manually. In order to use the existing hardware, we need to follow the details in the above thread.
 
Given this position I have the following questions?
 
  • Were Hilscher expecting an EEPROM to be connected to this card? The first reference I found to this is in the recent forum thread dated January 2020.
  • Does Hilscher have any design notes/guidance regarding connecting the EEPROM? From what I can see in the thread it appears that the EEPROM should be located “on the HAT/NPIX at I2C0 bus”. Is anything else required other than the EEPROM contents?
Thanks
Mike
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#2
I am sorry that it is not clear what is all about the ID -EEPROM in the thread you mentioned. Basically I can repeat what is said in this post: "Here is the spec how to generate an ID EEPROM binary file in general for HAT + the tools: https://github.com/raspberrypi/hats"

Once again: The ID EEPROM is nothing Hilscher invented but the Raspberry Pi Foundation for HAT modules.HAT modules available on the market for hundrets of different applications are those modules you can plug onto the 40 pin header of an original Raspberry Pi: https://www.raspberrypi.org/blog/introdu...y-pi-hats/

But as you can imagine HAT modules are not practicable for a closed box like netPI cause to reach the connector you would have to open the housing to extend netPI's functionality. This is why we decided to route the signals of the original 40 pin header to a mPCIe connector inside netPI instead and make it accessible via an extension slot at the bottom of the device via small boards named NPIX. So what HAT is for Raspberry Pi, NPIX is for netPI.

Since HAT = NPIX the rules for a a designer remains the same and also the conditions that apply for HAT prescribed by Raspberry Pi Foundation years before. Just the form factor is different ... and some of the original 40 signals are missing with netPI. E.g. the SPI signal used for netX communication.

My link above directs you this site https://github.com/raspberrypi/hats which is the same link as mentioned in your referenced thread. In this spec you find another link if you read one that defines the format of the ID-EEPROM content: https://github.com/raspberrypi/hats/blob...-format.md.

So it is not Hilscher expecting an EEPROM but the Linux and the Raspberry Pi/netPI bootloader if you want to signal it "hey here is an additional hardware, please load the corresponding kernel driver module during Linux boot sequence or configure IO signals to be input or output during boot times". So the flexible portion of hardware "tells" the default Linux what capabilities it has. The mechanism behind is this one: https://en.wikipedia.org/wiki/Device_tree. While the main netPI Linux and hardware uses a fixed device tree, the EEPROM delivers a flexible device tree portion additionally causing the booting Linux to react and deal with the settings.

What hardware have you in mind to develop? Some of the NPIX/HAT pins can be used directly without the use of an EEPROM and needs no device tree configuration and can be handle with default Linux Kernel that is booted by netPI.

Thx
Armin
You never fail until you stop trying.“, Albert Einstein (1879 - 1955)

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